1. Field of the invention
The present invention relates, in general, to a selective copper deposition method and, more particularly, to use of electrochemistry for copper deposition.
2. Description of the Prior Art
Most of metal wirings used in VLSI devices are made of tungsten, superior in electromigration (hereinafter referred to as "EM"), or aluminum, relatively low in electrical resistance. However, the two types of metal wirings cannot satisfy the EM and electrical resistance required for 1 giga or more DRAM. Recently, active research has been directed to copper, a promising metal.
To date, the use of wirings of copper includes a significant problem. In detail, there are not yet established standards for precursors to be used upon deposition and the deposition methods thereof, membrane quality and forming methods of pattern.
In copper-depositing methods suggested up to date, the most representative is metal-organic chemical vapor deposition (hereinafter referred to as "MOCVD"), in which organo-metals, represented by AcAc (acetylacetone R.dbd.R'.dbd.CH.sub.3), hf.sub.ac (1,1,1,5,5,5-hexafluoroacetylacetone R.dbd.R'.dbd.CF.sub.3) and tf.sub.ac (trifluoroacetylacetone R.dbd.CF.sub.3) are utilized as precursors. However, when blanket deposition is effected by MOCVD, problems for membrane quality and subsequent pattern formation also remain unsolved.
For pattern formation, the damascene process, developed by IBM corporation, U.S.A., is one of the solutions, which will be illustrated in conjunction with FIGS. 1A to 1D in order to better understand the background of the invention.
FIG. 1A shows a wafer 1 of which the surface is deposited with, an intermetallic dielectric (hereinafter referred to as "MD") 2, an insulating film.
On the IMD is formed photosensitive film patterns 3 which serve as a mask in subsequent photolithographic process, as shown in FIG. 1B. As a result of this etching, the insulating film is selectively removed so as to form spaced-apart patterns.
Following removal of the photosensitive film patterns 3, a blanket of copper 4 is formed over the resulting wafer by use of CVD, as shown in FIG. 1C.
Then, a chemical mechanical polishing (hereinafter referred to as "CMP") process is effected on the copper blanket, to form a wiring structure in which insulating films and copper films 4' alternate.
As for technique for the copper blanket, when copper precursors are let to enter a chamber, thermal energy is utilized to cleave copper from the precursors which is, then, deposited over the wafer 1 present in the chamber.
In as much as the copper film obtained by such MOCVD is based on the separation of copper from its precursors using thermal energy, carbon bonds in the precursors inevitably break owing to which contamination of copper occurs. Therefore, it is impossible to obtain 1.7 .mu..OMEGA.cm, the resistance of pure copper.
After depositing copper, when the copper blanket thus obtained is subjected to etch to form predetermined patterns, the copper is reacted with a base etchant, e.g. BCl.sub.3 or Cl.sub.2, to give CuCl.sub.2, a product. Since CuCl.sub.2 sublimes at 200.degree. C. or higher, the temperature of wafer must be elevated up to at least 200.degree. C. in order to obtain desired copper patterns.
In particular, this technique is difficult to apply for highly integrated devices very dense but relatively poor in topology, such as VLSI. Copper deposition has appeared as a hot issue in manufacture of semiconductor devices.